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1 / 16 02.mar.2012 rev.001 www.rohm.com tsz02201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 14 ? 001 4.5v to 5.5v, 2.0a 1ch s ynchronous buck converter i ntegrated fet BD8961NV general description rohms high efficiency step - down switching regulator BD8961NV is a power supply designed to produce a low voltage including 3.3 volts from 5 volts power supp ly line. offers high efficiency with synchronous rectifier. employs a current mode control system to provide faster transient response to sudden change in load. features ? offers fast transient response with current mode pwm control system. ? offers highly e fficiency for all load range with synchronous rectifier (nch/pch fet) ? incorporates soft - start function. ? incorporates thermal protection and ulvo functions. ? incorporates short - current protection circuit with time delay function. ? incorporates shutdown fun ction key specification ? i nput voltage range: 4.5v to 5.5v ? o utput voltage range: 3.3v(typ.) ? o utput current: 2.0 a ( max.) ? switching frequency: 1.0mhz(typ.) ? pch fet on resistance: 200 m (typ.) ? nch fet on resistance: 150 m (typ.) ? s tandby current: 0 a ( typ. .) ? operating temperature range : - 25 to + 10 5 packages son008v5060 5.0mm x 6.0mm x 1.0mm applications p ower supply for lsi including dsp, micro computer and asic typical application circuit fig.37 gnd,pgnd sw v cc ,pv cc en v out ith v cc v out cin r it h c ith l esr c o r o v out fig.1 typical application product structure silicon monolithic integrated circuit this product is not designed protection against radioactive rays.
2 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 en pv cc pgnd vout v cc ith gnd sw pin configuration pin description pin no. pin name pin function 1 vout output voltage pin 2 v cc v cc power supply input pin 3 ith gmamp output pin/connected phase compensation capacitor 4 gnd ground 5 pgnd nch fet source pin 6 sw pch/nch fet drain output pin 7 pv cc pch fet source pin 8 en enable pin (active high) block diagram fig.3 block diagram top view 7 8 6 5 3 4 2 1 fig.2 pin configuration
3 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 absolute maximum ratings parameter symbol ratings unit v cc voltage v cc - 0.3 to +7 1 v pv cc voltage pv cc - 0.3 to +7 1 v en voltage v en - 0.3 to +7 v sw,ith voltage v sw ,v ith - 0 .3 to +7 v power dissipation 1 pd1 900 2 mw power dissipation 2 pd2 3900 3 mw operating temperature range topr - 25 to +105 storage temperature range tstg - 55 to +150 maximum junction temperature tjmax +150 1 pd should not be exceeded. 2 de rating in done 7.2mw/ for temperatures above ta=25 , mounted on 70mm70mm1.6mm glass epoxy pcb (the density of copper:3%) 3 derating in done 31.2mw/ for temperatures above ta=25 , mounted on jesd51 - 7. operating ratings (ta=25 ) parameter symbo l ratings unit min. typ. max. v cc voltage v cc *4 4.5 5.0 5.5 v pv cc voltage p vcc *4 4.5 5.0 5.5 v en voltage v en 0 - vcc v sw average output current isw *4 - - 2.0 a 4 pd should not be e xceeded. electrical characteristics (ta=25 , v cc =pv cc =3.3v, en=v cc . ) parameter symbol limits unit conditions min. typ. max. standby current i stb - 0 10 a cc - 250 450 a enl - gnd 0.8 v standby mode en high voltage v enh 2.0 v cc - v active mode en input current i en - 1 10 a en =5v oscillation frequency f osc 0.8 1 1.2 mhz pch fet on resistance r onp - 200 320 m vcc =5v nch fet on resistance r onn - 150 270 m vcc =5v output voltage v out 3.250 3. 300 3.350 v ith si nk current i thsi 10 20 - a out =3.6v ith s ource c urrent i thso 10 20 - a out =3.0v uvlo threshold voltage v uvlo1 3.6 3.8 4.0 v v cc =50v uvlo2 3.65 3.90 4.2 v v cc =05v ss 0.5 1 2 ms timer l atch time t latch 1 2 3 ms scp/tsd operated output short circuit threshold voltage v scp - 1.65 2.31 v out v out =3.30v
4 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 typical performance curves fig.4 vcc - vout fig.6 iout - vout fig.5 ven - vout fig.7 ta - v out fig.37
5 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 fig. 10 ta - r onn , r onp fig. 11 ta - v en fig.8 efficiency fig.9 ta - f osc
6 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 fig.12 ta - i cc fig.13 vcc - fosc fig.14 soft start waveform fig.15 sw waveform io=10ma
7 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 fig.1 7 transient response io=2a 1a(10s) fig. 1 6 transient response io=1a 2a(10s)
8 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 application information operation BD8961NV is a synchronous rectifying step - down switching regulator th at achieves faster transient response by employing current mode pwm c ontrol system. synchronous rectifier it does not require the power to be dissipated by a rectifier externally connected to a conventional dc/dc converter ic, and its p.n junction shoot - through protection circuit limits the shoot - through current during operation, by which the power dissipation of the set is reduced. current mode pwm control synthesizes a pwm control signal with a inductor current feedback loop added to the voltage feed back. ? pwm (pulse width modulation) control the oscillation frequency for pwm is 1 mhz. set signal form osc turns on a p - channel mos fet (while a n - channel mos fet is turned off), and an inductor current i l increases. the current comparator (current comp ) receives two signals, a current feedback control signal (sense: voltage converted from i l ) and a voltage feedback control signal (fb), and issues a reset signal if both input signals are identical to each other, and turns off the p - channel mos fet (while a n - channel mos fet is turned on) for the rest of the fixed period. the pwm control repeat this operation. fig . 18 diagram of current mode pwm control fig. 1 9 pwm switching timing chart current comp set reset sw v out pvcc gnd gnd gnd i l (ave) v out (ave) sense fb i l osc level shift driver log ic r q s i l sw ith current comp gm amp. set reset fb load sense v out v out
9 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 description of operations ? soft - start function en terminal shifted to high activates a soft - starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. ? shutdo wn function with en terminal shifted to low, the device turns to standby mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to off. circuit current during standby is 0f (typ.). ? uvlo funct ion detects whether the input voltage sufficient to secure the output voltage of this ic is supplied. and the hysteresis width of 100mv (typ.) is provided to prevent output chattering. fig.20 soft start, shutdown, uvlo timing ch art ? short - current protection circuit with time delay function turns off the output to protect the ic from breakdown when the incorporated current limiter is activated continuously for the fixed time(t latch ) or more. the output thus held tuned off may be reco vered by restarting en or by re - unlocking uvlo. fig.21 short - current protection circuit with time delay timing chart t2=t latch output off latch en v out output short circuit threshold voltage i l standby mode operating mode operating mode en timer latch en standby mode i l limit t1 10 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 information on advantages advantage 1 offers fast transient response with current mode control system. voltage drop due to sudden change in load was reduced by about 50%. fig.2 2 comparison of transient response advantage 2 offers high efficiency with synchronous rectifier ? for heavier load: utilizes the synchronous rectifying mode and the low on - r esistance mos fets incorporated as power transistor. on resistance of p - channel mos fet : 200m(typ.) on resistance of n - channel mos fet : 160m(typ.) advantage 3 ? supplied in smaller package due to small - sized power mos fet incorporated. reduces a mounting area required. fig.2 4 example application conventional product (load response i o =0.1a 0.6a) BD8961NV (load response i o =1a 2a) v out i out v out i out 160mv 100mv fig. 2 3 efficiency vcc=5v ? output capacitor co requi red for current mode control: 22 f ceramic capacitor ? inductance l required for the operating frequency of 1 mhz: 2.2 h inductor r ith l co v out c ith v cc cin 10mm 15mm r ith c ith c in c o l dc/dc convertor controller 0 10 20 30 40 50 60 70 80 90 100 10 100 1000 10000 output current:i out [ma] efficiency: [%]
11 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 switching regulator efficiency efficiency ? may be expressed by the equation shown below: efficiency may be improved by reducing the switching regulator power di ssipation factors p d as follows: dissipation factors: 1) on resistance dissipation of inductor and fet pd(i 2 r) 2) gate charge/discharge dissipation pd(gate) 3) switching dissipation pd(sw) 4) esr dissipation of capacitor pd(esr) 5) operating current diss ipation of ic pd(ic) 1)pd(i 2 r)=i out 2 (r coil +r on ) (r coil [] dc resistance of inductor, r on [] on resistance of fet, i out [a] output current.) 2)pd(gate)=cgsfv (cgs[f] gate capacitance of fet, f[hz] switching frequency, v[v] gate driving voltage of fet) 4)pd(esr)=i rms 2 esr (i rms [a] ripple current of capacitor, esr[] equivalent series resistance.) 5)pd(ic)=vini cc (i cc [a] circuit current.) consideration on permissible dissipation and heat generation as this ic functions with high efficiency wit hout significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. in case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or hig her temperature, the permissible dissipation and/or heat generation must be carefully considered. for dissipation, only conduction losses due to dc resistance of inductor and on resistance of fet are considered. because the conduction losses are consider ed to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation. if v cc =5v, v out =3.3v, r onp =0.2, r onn =0.16 i out =2a, for example, d=v out /v cc =3.3/5.0=0.66 r o n =0.660.20+(1 - 0.66)0.16 =0.132+0.0544 =0.1864[] p=2 2 0.1864 0.7456w] as r onp is greater than r onn in this ic, the dissipation increases as the on duty becomes greater. with the consideration on the dissipation as above, thermal design must be carrie d out with sufficient margin allowed. = out i out viniin 100[%]= p out pin 100[%]= p out p out +p d 2 c rss i out f i drive 3)pd(sw)= (c rss [f] drive [a] 0 25 50 75 100 125 150 0 2.0 3.0 4.0 0.90w 3.9w 105 1.0 0.64w fig.2 5 thermal derating curve (son008v5060) p=i out 2 r on r on =dr onp +(1 - d)r onn d out /v cc ) r coil onp onn out pow er dissipation:pd [w] ambient temperature:ta [ ] for son008v5060 jedec 4 layer board 76.2114.31.6mm j - a=32.1 /w for son008v5060 rohm standard 1 layer board 70701.6mm j - a=138.9 /w ic only j - a=195.3 /w
12 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 selection of components externally connected 1. selection of inductor (l) * current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases eff iciency. the inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. if v cc =5v, v out =3.3v, f=1mhz, i l =0.32a=0.6a, for example,(BD8961NV) *select the inductor of low resistance component (such as dcr and acr) to minimize dissipation in the inductor for better efficiency. 2. selection of output capacitor (c o ) 3. sel ection of input capacitor (cin) a low esr 22f/10v ceramic capacitor is recommended to reduce esr dissipation of input capacitor for better efficiency. the inductance significantly depends on output ripple current. as seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. i l = (v cc - v out )v out lv cc f [a] ??? i l =0.3i out max. [a] ??? cc - v out )v out i l v cc f [h] ??? (i l : output ripple current, and f: switching frequency) (5.0 - 3.3)3.3 0.65.01m l= =1.87 2.2[h] i l v cc il l co v out fig. 26 output ripple current i l fig.27 output capacitor v cc l co v out esr fig.28 i nput capacitor v cc l co v out cin output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. output ripple voltage is determined by the equation (4) v out =i l esr [v] ??? (i l : output ripple current, esr: equivalent series resistance of output capacitor) *rating of the capacitor should be determined allowing sufficient margin against output voltage. less esr allows reduction in output ripple voltage. 22 f to 100 f ceramic capacitor is recommended. input capacitor to select must be a low esr capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. the ripple current i rms is given by the equation ( 5 ): i rms =i out v out (v c c - v out ) v cc [a] ??? out , i rms = i out 2 < worst case > i rms(max.) i rms =2 3.3(5.0 - 3.3) 5.0 =0.947[a rms ] cc =5.0v, v out =3.3v, and i outmax.= 2a, (bd 8961 nv)
13 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 4. determination of r ith , c ith that works as a phase compensator as the current mode control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a cr filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its esr. so, the phases are easily compensated by adding a zero to the power amplifier output with c and r as described below to cancel a pole at the power amplifier. stable feedback loop m ay be achieved by canceling the pole fp (min.) produced by the output capacitor and the load resistance with cr zero correction by the error amplifier. fp= 2r o c o 1 fz (esr) = 2e sr c o 1 pole at power amplifier when the output current decreases, the load resistance ro increases and the pole frequency lowers. fp (min.) = 2r omax. c o 1 [hz]with lighter load (max.) = 2r omin. c o 1 [hz] with heavier load (amp.) = 2r ith c ith 1 gnd,pgnd sw v cc ,pv cc en v out ith v cc v out cin r ith c ith l esr c o r o v out fig. 3 1 typical application fz (amp.) = fp (min.) 2r ith c ith 1 = 2r omax. c o 1 gain [db] phase [deg] fig.29 open loop gain characteristics a 0 0 - 90 a 0 0 - 90 fz(amp.) fig.30 error amp phase compensation characteristics fp(min.) fp(max.) fz(esr) i out min. i out max. gain [db] pha se [deg] increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (this is because when the capacitance is doubled, the capacitor esr reduces to half.)
14 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 BD8961NV cautions on pc board layout fig.32 layout diagram for the sections dr awn with heavy line, use thick conductor pattern as short as possible. lay out the input ceramic capacitor c in closer to the pins pv cc and pgnd, and the output capacitor co closer to the pin pgnd. lay out c ith and r ith between the pins ith and gnd as near as possible with least necessary wiring. son008v5060 (BD8961NV) has thermal fin on the reverse of the package. the package thermal performance may be enhanced by bonding the fin to gnd plane which take a large area of pcb. recommended c omponents lists on a bove a pplication symbol part value manufacturer series l coil 2.2uh tdk ltf5022 - 2r2n3r2 c in ceramic capacitor 22uf kyocera cm32x5r226m10a c o ceramic capacitor 22uf kyocera cm316b226m06a c ith ceramic capacitor 680pf murata grm18 serise r ith resi stance 12k rohm mc r 03serise *the parts list presented above is an example of recommended parts. although the parts are sound, actual circuit characterist ics should be checked on your application carefully before use. be sure to allow sufficient margins t o accommodate variations between external devices and this ic when employing the depicted circuit with other circuit constants modified. both static and transient characteristics should be considered in est ablishing these margins. when switching noise is s ubstantial and may impact the system, a low pass filter should be inserted between the vcc and pvcc pins, and a schottky barr ier diode established between the sw and pgnd pins. i/o equivalence circuit fig.33 i/o equivalence circuit vout v cc ith gnd en pv cc sw pgnd v cc r ith gn d c o c in v out en l c ith en ? en pin ? sw pin pv cc sw pv cc pv cc ith ? ith pin v cc v cc v out 10k ? vout pin
15 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 operational notes 1. absolute maximum ratings while utmost care is taken to quality control of this product, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operating temperature range may result in breakage. if broken, short - mode or open - mode may not be identified. so if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of f uses. 2. electrical potential at gnd gnd must be designed to have the lowest electrical potential in any operating conditions. 3. short - circuiting between terminals, and mismounting when mounting to pc board, care must be taken to avoid mistake in its or ientation and alignment. failure to do so may result in ic breakdown. short - circuiting due to foreign matters entered between output terminals, or between output and power supply or gnd may also cause breakdown. 4.operation in strong electromagnetic fie ld be noted that using the ic in the strong electromagnetic radiation can cause operation failures. 5. thermal shutdown protection circuit thermal shutdown protection circuit is the circuit designed to isolate the ic from thermal runaway, and not intended to protect and guarantee the ic. so, the ic the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. inspection with the ic set to a pc board if a capacitor must be connec ted to the pin of lower impedance during inspection with the ic set to a pc board, the capacitor must be discharged after each process to avoid stress to the ic. for electrostatic protection, provide proper grounding to assembling processes with special c are taken in handling and storage. when connecting to jigs in the inspection process, be sure to turn off the power supply before it is connected and removed. 7. input to ic terminals this is a monolithic ic with p + isolation between p - substrate and each element as illustrated below. this p - layer and the n - layer of each element form a p - n junction, and various parasitic element are formed. if a resistor is joined to a transistor terminal as shown in fig 34 . p - n junction works as a parasitic diode if the following relationship is satisfied; gnd>terminal a (at resistor side), or gnd>terminal b (at transistor side); and if gnd>terminal b (at npn transistor side), a parasitic npn transistor is activated by n - l ayer of other element adjacent to the above - mentioned parasitic diode. the structure of the ic inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. it is ther efore requested to take care not to use the device in such manner that the voltage lower than gnd (at p - substrate) may be applied to the input terminal, which may result in activation of parasitic elements. fig. 34 simplified structure of monorisic ic 8. ground wiring pattern if s mall - signal gnd and large - current gnd are provided, it will be recommended to separate the large - current gnd pattern from the small - signal gnd pattern and establish a single ground at the reference point of the set pcb so that resistance to the wiring patt ern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small - signal gnd. pay attention not to cause fluctuations in the gnd wiring pattern of external parts as well. 9 . selection of inductor it is recommended to use an inductor with a series resistance element (dcr) 0.1 or less. note that use of a high dcr inductor will cause an inductor loss, resulting in decreased output voltage. should this condition continue for a specified period (soft start time + timer la tch time), output short circuit protection will be activated and output will be latched off. when using an inductor over 0.1, be careful to ensure adequate margins for variation between external devices and this ic, including transient as well as static c haracteristics. furthermore, in any case, it is recommended to start up the output with en after supply voltage is within operation range. status of this document the japanese version of this document is formal specification. a customer may use this trans lation version only for a reference to help reading the formal version. if there are any differences in translation version of this document formal version takes priority. resistor transistor (npn) n n n p + p + p p substrate gnd parasitic element pin a n n p + p + p p substrate gnd parasitic element pin b c b e n gnd pin a parasiti c elemen t pin b other adjacent elements e b c gnd parasitic element
16 / 16 BD8961NV data s heet 02.mar.2012 rev.001 www.rohm.com tsz 0 2201 - 0j3j0aj00020 - 1 - 2 ? rohm co., ltd. all rights reserved. tsz22111 ? 15 ? 001 ordering information physical dimension tape and reel information marking diagram b d 8 9 6 1 n v - e 2 package nv: son008v5060 packaging and forming specification e2: embossed tape and reel son008v5060 (top view) d 8 9 6 1 part number marking lot number 1pin mark
datasheet d a t a s h e e t notice - rev.001 notice precaution for circuit design 1) the products are designed and produced for applicatio n in ordinary electronic equipment (av equipment, oa equipment, telecommunication equipment, home appliances, amusement equipment, etc.). if the products are to be used in devices requiring extremel y high reliability (medical equipment, transport equipment, aircraft/spacecraft, nuclear power controllers, fuel contro llers, car equipment including car accessories, safety devices, etc.) and whose malfunction or operational error may endanger human life and sufficient fail-safe measures, please consult with the rohm sales staff in advance. if product malfunctions may re sult in serious damage, including that to human life, sufficient fail-safe measures must be taken, including the following: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits in the case of single-circuit failure 2) the products are designed for use in a standard environment and not in any spec ial environments. a pplication of the products in a special environment can deteriorate product per formance. accordingly, verification and confirmation of product performance, prior to use, is recomm ended if used under the following conditions: [a] use in various types of liquid, includin g water, oils, chemicals, and organic solvents [b] use outdoors where the products are exposed to direct sunlight, or in dusty places [c] use in places where the products are exposed to sea winds or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use in places where the products are exposed to static electricity or electromagnetic waves [e] use in proximity to heat-producing componen ts, plastic cords, or other flammable items [f] use involving sealing or coating the prod ucts with resin or other coating materials [g] use involving unclean solder or use of water or water-soluble cleaning agents for cleaning after soldering [h] use of the products in places subject to dew condensation 3) the products are not radiation resistant. 4) verification and confirmation of performance characte ristics of products, after on- board mounting, is advised. 5) in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse) is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 6) de-rate power dissipation (pd) depending on ambient temperature (ta). when used in sealed area, confirm the actual ambient temperature. 7) confirm that operation temper ature is within the specified range described in product specification. 8) failure induced under deviant condition from what def ined in the product specific ation cannot be guaranteed. precaution for mounting / circuit board design 1) when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the remainder of fl ux may negatively affect product performance and reliability. 2) in principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the company in advance. regarding precaution for mounting / circu it board design, please specially refe r to rohm mounting specification precautions regarding application examples and external circuits 1) if change is made to the constant of an external circuit, allow a sufficient margin due to variations of the characteristics of the products and external components, including transient characteristics, as well as static characteristics. 2) the application examples, their const ants, and other types of information cont ained herein are applicable only when the products are used in accordance with standard methods . therefore, if mass production is intended, sufficient consideration to external conditions must be made.
datasheet d a t a s h e e t notice - rev.001 precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution during manufacturing and st oring so that voltage exceeding product ma ximum rating won't be applied to products. please take special care under dry condition (e.g. grounding of human body / equipment / so lder iron, isolation from charged objects, setting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1) product performance and soldered connections may deteriorate if the products are stored in the following places: [a] where the products are exposed to sea winds or corrosive gases, including cl2, h2s, nh3, so2, and no2 [b] where the temperature or humidity exceeds those recommended by the company [c] storage in direct sunshine or condensation [d] storage in high electrostatic 2) even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding recommended storage time period . 3) store / transport cartons in the correct direction, whic h is indicated on a carton as a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4) use products within the specified time after opening a dry bag. precaution for product label qr code printed on rohm product label is only for internal us e, and please do not use at cust omer site. it might contain a internal part number that is inconsistent with an product part number. precaution for disposition when disposing products please dispose them properly with a industry waste company. precaution for foreign exchange and foreign trade act since concerned goods might be fallen under controlled goods prescribed by foreign exchange and foreign trade act, please consult with rohm in case of export. prohibitions regarding industrial property 1) information and data on products, including application exam ples, contained in these specifications are simply for reference; the company does not guarantee any industrial pr operty rights, intellectual property rights, or any other rights of a third party regarding this information or data. ac cordingly, the company does not bear any responsibility for: [a] infringement of the intellectual property rights of a third party [b] any problems incurred by the us e of the products listed herein. 2) the company prohibits the purchaser of its products to exercise or use the in tellectual property rights, industrial property rights, or any other rights that either belong to or are controlled by the company, other than the right to use, sell, or dispose of the products.

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